<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-04-18T02:04:21Z</responseDate><request verb="GetRecord" identifier="oai:www.recercat.cat:2072/180477" metadataPrefix="marc">https://recercat.cat/oai/request</request><GetRecord><record><header><identifier>oai:recercat.cat:2072/180477</identifier><datestamp>2024-12-13T09:25:15Z</datestamp><setSpec>com_2072_63425</setSpec><setSpec>com_2072_63424</setSpec><setSpec>com_2072_63412</setSpec><setSpec>com_2072_2015</setSpec><setSpec>col_2072_63426</setSpec></header><metadata><record xmlns="http://www.loc.gov/MARC21/slim" xmlns:dcterms="http://purl.org/dc/terms/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.loc.gov/MARC21/slim http://www.loc.gov/standards/marcxml/schema/MARC21slim.xsd">
   <leader>00925njm 22002777a 4500</leader>
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      <subfield code="a">dc</subfield>
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   <datafield ind2=" " ind1=" " tag="720">
      <subfield code="a">Gamell Balmanya, Marc</subfield>
      <subfield code="e">author</subfield>
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   <datafield ind2=" " ind1=" " tag="260">
      <subfield code="c">2012-03-07T15:54:17Z</subfield>
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      <subfield code="a">Technological limitations and power constraints are resulting in high-performance parallel computing architectures that are based on large numbers of high-core-count processors. Commercially available processors are now at 8 and 16 cores and experimental platforms, such as the many-core Intel Single-chip Cloud Computer (SCC) platform, provide much higher core counts. These trends are presenting new sets of challenges to HPC applications including programming complexity and the need for extreme energy efficiency.In this work, we first investigate the power behavior of scientific PGAS application kernels on the SCC platform, and explore opportunities and challenges for power management within the PGAS framework. Results obtained via empirical evaluation of Unified Parallel C (UPC) applications on the SCC platform under different constraints, show that, for specific operations, the potential for energy savings in PGAS is large; and power/performance trade-offs can be effectively managed using a cross-layerapproach. We investigate cross-layer power management using PGAS language extensions and runtime mechanisms that manipulate power/performance tradeoffs. Specifically, we present the design, implementation and evaluation of such a middleware for application-aware cross-layer power management of UPC applications on the SCC platform. Finally, based on our observations, we provide a set of recommendations and insights that can be used to support similar power management for PGAS applications on other many-core platforms.</subfield>
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   <datafield ind2=" " ind1=" " tag="520">
      <subfield code="a">En este trabajo se investiga el comportamiento de alimentación de los núcleos de aplicaciones científicas PGAS en la plataforma de SCC y se exploran las oportunidades y desafíos para la administración de energía en el marco PGAS.</subfield>
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   <datafield ind2=" " ind1=" " tag="520">
      <subfield code="a">En aquest treball s'investiga el comportament d'alimentació dels nuclis d'aplicacions científiques PGAS a la plataforma de SCC i s'exploren les oportunitats i desafiaments per a la gestió de l'energia en el marc PGAS.</subfield>
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   <datafield ind1="8" ind2=" " tag="024">
      <subfield code="a">http://hdl.handle.net/10609/11886</subfield>
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   <datafield tag="653" ind2=" " ind1=" ">
      <subfield code="a">PGAS</subfield>
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      <subfield code="a">Many-core</subfield>
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      <subfield code="a">Intel</subfield>
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      <subfield code="a">SCC</subfield>
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      <subfield code="a">Unified Parallel C</subfield>
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      <subfield code="a">PGAS</subfield>
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      <subfield code="a">PGAS</subfield>
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      <subfield code="a">Many-core</subfield>
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   <datafield tag="653" ind2=" " ind1=" ">
      <subfield code="a">Many-core</subfield>
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      <subfield code="a">Intel</subfield>
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      <subfield code="a">Intel</subfield>
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   <datafield tag="653" ind2=" " ind1=" ">
      <subfield code="a">SCC</subfield>
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   <datafield tag="653" ind2=" " ind1=" ">
      <subfield code="a">SCC</subfield>
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   <datafield tag="653" ind2=" " ind1=" ">
      <subfield code="a">Unified Parallel C</subfield>
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   <datafield tag="653" ind2=" " ind1=" ">
      <subfield code="a">Unified Parallel C</subfield>
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      <subfield code="a">Application software -- Development</subfield>
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   <datafield tag="653" ind2=" " ind1=" ">
      <subfield code="a">Programari d'aplicació -- Desenvolupament</subfield>
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      <subfield code="a">Software de aplicación -- Desarrollo</subfield>
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   <datafield ind2="0" ind1="0" tag="245">
      <subfield code="a">Exploring Cross-layer power management for PGAS applications on the SCC platform</subfield>
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