Title:
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libPRISM: an intelligent adaptation of prefetch and SMT levels
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Author:
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Ortega, Cristobal; Moreto Planas, Miquel; Casas Guix, Marc; Bertran, Ramon; Buyuktosunoglu, Alper; Eichenberger, Alexandre; Bose, Pradip
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Other authors:
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Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
Abstract:
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Current microprocessors include several knobs to modify the hardware behavior in order to improve performance under different workload demands. An impractical and time consuming offline profiling is needed to evaluate the design space to find the optimal knob configuration. Different knobs are typically configured in a decoupled manner to avoid the time-consuming offline profiling process. This can often lead to underperforming configurations and sometimes to conflicting decisions that jeopardize system power- performance efficiency. Thus, a dynamic management of the different hardware knobs is necessary to find the knob configuration that maximizes system power-performance efficiency without the burden of offline profiling.
In this paper, we propose libPRISM, an infrastructure that enables the transparent management of multiple hardware knobs in order to adapt the system to the evolving demands of hardware resources in different workloads. We use libPRISM to implement a policy that maximizes system performance without degrading energy efficiency by dynamically managing the SMT level and prefetcher hardware knobs of an IBM POWER8 system. We evaluate our solution using 24 applications from 3 different parallel benchmarks suites without the need of offline profiling or workload modification. Overall, the solution increases performance up to 220% (15.4% on average) and reduces dynamic power consumption up to 13% (2.0% on average) when compared to the static default knob configuration. |
Abstract:
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This work has been supported by the RoMoL ERC Advanced Grant (GA 321253), by the European HiPEAC Network of Excellence, by
the Spanish Ministry of Science and Innovation (contracts TIN2015-65316-P), by Generalitat de Catalunya (contracts 2014-SGR-1051 and
2014-SGR-1272) and by IBM/BSC Deep Learning Center initiative.
This research was developed in part with funding from the Defense Advanced Research Projects Agency (DARPA). The views, opinions
and/or findings expressed are those of the author and should not be interpreted as representing the official views or policies of the
Department of Defense or the U.S. Government.
M. Moreto has been partially supported by the Ministry of Economy and Competitiveness under Juan de la Cierva postdoctoral fellowship number JCI-2012-15047. M. Casas is supported by the Secretary for Universities and Research of the Ministry of Economy
and Knowledge of the Government of Catalonia and the Cofund programme of the Marie Curie Actions of the 7th R&D Framework
Programme of the European Union (Contract 2013 BP B 00243). |
Abstract:
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Peer Reviewed |
Subject(s):
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-Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors -Parallel processing (Electronic computers) -Microprocessors -- Energy consumption -Computing methodologies -Parallel programming languages -Computer systems organization -Multicore architectures -Software and its engineering -Software libraries and repositories -Processament en paral·lel (Ordinadors) -Microprocessadors -- Consum d'energia |
Rights:
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Document type:
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Article - Submitted version Conference Object |
Published by:
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Association for Computing Machinery (ACM)
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