In code-division multiple access (CDMA) systems a delay-lock loop (DLL) is used to keep a fine alignment between sequences. A simulation program for the second-order DLL has been developed. The program allows an optimum design of the loop low-pass filter in order to guarantee the right clock frequency acquisition and minimum residual jitter. The mean time to lose lock (MTLL) of the DLL has also been obtained by computer simulation for two different shifts between early and late codes. Results show a remarkable sensitivity to the signal-to-noise-ratio in the data bandwidth.