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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
dc.contributor.author | Molina Clemente, Carlos |
dc.contributor.author | González Colás, Antonio María |
dc.contributor.author | Tubella Murgadas, Jordi |
dc.date | 2002 |
dc.identifier.citation | Molina, C., González, A., Tubella, J. Trace-level speculative multithreaded architecture. A: IEEE International Conference on Computer Design: VLSI in Computers and Processors. "2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors: September 16-18, 2002 Freiburg, Germany: proceedings". Freiburg: Institute of Electrical and Electronics Engineers (IEEE), 2002, p. 402-407. |
dc.identifier.citation | 0-7695-1700-5 |
dc.identifier.citation | 10.1109/ICCD.2002.1106802 |
dc.identifier.uri | http://hdl.handle.net/2117/105271 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.relation | http://ieeexplore.ieee.org.recursos.biblioteca.upc.edu/document/1106802/ |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Simultaneous multithreading processors |
dc.subject | Microprocessors |
dc.subject | Computer architecture |
dc.subject | Multi-threading |
dc.subject | Microprocessadors |
dc.subject | Arquitectura d'ordinadors |
dc.title | Trace-level speculative multithreaded architecture |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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