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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | García Flores, Víctor |
dc.contributor.author | Gomez Luna, J. |
dc.contributor.author | Grass, Thomas Dieter |
dc.contributor.author | Rico, Alejandro |
dc.contributor.author | Ayguadé Parra, Eduard |
dc.contributor.author | Pena, A. J. |
dc.date | 2016 |
dc.identifier.citation | Garcia, V., Gomez, J., Grass, T., Rico, A., Ayguade, E., Pena, A. Evaluating the effect of last-level cache sharing on integrated GPU-CPU systems with heterogeneous applications. A: IEEE International Symposium on Workload Characterization. "2016 IEEE International Symposium on Workload Characterization (IISWC 2016): Providence, Rhode Island, USA: 25-27 September 2016". Providence, Rhode Island: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 168-177. |
dc.identifier.citation | 978-1-5090-3895-4 |
dc.identifier.citation | 10.1109/IISWC.2016.7581277 |
dc.identifier.uri | http://hdl.handle.net/2117/96866 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.relation | http://ieeexplore.ieee.org/document/7581277/ |
dc.relation | info:eu-repo/grantAgreement/ES/1PE/TIN2015-65316-P |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Microprocessors |
dc.subject | Computer architecture |
dc.subject | Cache storage |
dc.subject | Graphics processing units |
dc.subject | Microprocessor chips |
dc.subject | Last-level cache sharing |
dc.subject | Integrated GPU-CPU system |
dc.subject | Heterogeneous system |
dc.subject | Highperformance computing |
dc.subject | HPC |
dc.subject | Graphics processing unit |
dc.subject | Energy efficiency |
dc.subject | Virtual address space |
dc.subject | On-die GPU integration |
dc.subject | On-chip resource sharing |
dc.subject | Rodinia benchmark |
dc.subject | Unified memory address space |
dc.subject | GPGPU |
dc.subject | Microprocessadors |
dc.subject | Arquitectura d'ordinadors |
dc.title | Evaluating the effect of last-level cache sharing on integrated GPU-CPU systems with heterogeneous applications |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
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