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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Kosmidis, Leonidas |
dc.contributor.author | Quiñones, Eduardo |
dc.contributor.author | Abella Ferrer, Jaume |
dc.contributor.author | Vardanega, Tullio |
dc.contributor.author | Hernández, Carles |
dc.contributor.author | Gianarro, Andrea |
dc.contributor.author | Broster, Ian |
dc.contributor.author | Cazorla Almeida, Francisco Javier |
dc.date | 2016-11-01 |
dc.identifier.citation | Kosmidis, L., Quiñones, E., Abella, J., Vardanega, T., Hernández, C., Gianarro, A., Broster, I., Cazorla, F. Fitting processor architectures for measurement-based probabilistic timing analysis. "Microprocessors and microsystems", 1 Novembre 2016, vol. 47, núm. Part B, p. 287-302. |
dc.identifier.citation | 0141-9331 |
dc.identifier.citation | 10.1016/j.micpro.2016.07.014 |
dc.identifier.uri | http://hdl.handle.net/2117/100471 |
dc.language.iso | eng |
dc.relation | http://www.sciencedirect.com/science/article/pii/S0141933116300977 |
dc.relation | info:eu-repo/grantAgreement/ES/1PE/TIN2015-65316-P |
dc.relation | info:eu-repo/grantAgreement/ES/RYC-2013-14717 |
dc.relation | info:eu-repo/grantAgreement/EC/FP7/611085/EU/Probabilistic real-time control of mixed-criticality multicore and manycore systems/PROXIMA |
dc.rights | Attribution-NonCommercial-NoDerivs 4.0 International License |
dc.rights | https://creativecommons.org/licenses/by-nc-nd/4.0/ |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Embedded computer systems |
dc.subject | Cache memory |
dc.subject | Real-time data processing |
dc.subject | Worst-case execution time |
dc.subject | Processor architecture |
dc.subject | Cache memories |
dc.subject | Probabilistic analysis |
dc.subject | Time randomization |
dc.subject | Ordinadors immersos, Sistemes d' |
dc.subject | Memòria ràpida de treball (Informàtica) |
dc.subject | Temps real (Informàtica) |
dc.title | Fitting processor architectures for measurement-based probabilistic timing analysis |
dc.type | info:eu-repo/semantics/submittedVersion |
dc.type | info:eu-repo/semantics/article |
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