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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Panic, Milos |
dc.contributor.author | Hernández, Carles |
dc.contributor.author | Quiñones, Eduardo |
dc.contributor.author | Abella Ferrer, Jaume |
dc.contributor.author | Cazorla Almeida, Francisco Javier |
dc.date | 2016 |
dc.identifier.citation | Panic, M., Hernández, C., Quiñones, E., Abella, J., Cazorla, F. Modeling high-performance wormhole NoCs for critical real-time embedded systems. A: IEEE Real-Time and Embedded Technology and Applications Symposium. "2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS): 11-14 April 2016: Vienna, Austria: proceedings". Vienna: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 1-12. |
dc.identifier.citation | 9781467386395 |
dc.identifier.citation | 10.1109/RTAS.2016.7461342 |
dc.identifier.uri | http://hdl.handle.net/2117/98317 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.relation | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7461342 |
dc.relation | info:eu-repo/grantAgreement/ES/1PE/TIN2015-65316-P |
dc.relation | info:eu-repo/grantAgreement/ES/1PE/TIN2014-60404-JIN |
dc.relation | info:eu-repo/grantAgreement/ES/RYC-2013-14717 |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Multiprocessors |
dc.subject | Embedded computer systems |
dc.subject | Logic design |
dc.subject | Analytical models |
dc.subject | Network-on-chip |
dc.subject | Real time systems |
dc.subject | VLSI circuits |
dc.subject | Computing platform |
dc.subject | Design parameters |
dc.subject | Network-on-chip(NoC) |
dc.subject | Real-time embedded systems |
dc.subject | Shared resources |
dc.subject | Traversal time |
dc.subject | Virtual channels |
dc.subject | Worst-case execution time |
dc.subject | Multiprocessadors |
dc.subject | Ordinadors immersos, Sistemes d' |
dc.subject | Estructura lògica |
dc.title | Modeling high-performance wormhole NoCs for critical real-time embedded systems |
dc.type | info:eu-repo/semantics/submittedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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