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Title:
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Design and implementation of automatic test equipment IP module
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Author:
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Fransi Palos, Sergi; Farre Lozano, Goretti; Garcia Deiros, Lucas; Manich Bou, Salvador
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Other authors:
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Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat |
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Abstract:
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This paper presents an Intellectual Property (IP) module that includes fully functional autonomous Automatic Test Equipment (ATE). The module analyses responses from the Device Under Test (DUT) after sending test vectors to the device. Communication with the DUT is maintained through a synchronous bidirectional serial channel. The module has been designed for a fail-safe level of security, which means any single fault producing an erroneous output is detected. Several IP-ATEs can be synthesized in a single hardware platform to operate independently or coordinately. |
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Subject(s):
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-Àrees temàtiques de la UPC::Enginyeria electrònica
-Digital integrated circuits -- Testing
-Automatic Testing
-Digital Circuits
-Field Programmable Gate Arrays
-Intellectual Property
-Low Power Tester
-Low Cost ICs
-Multisite Tester.
-Circuits integrats digitals -- Proves |
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Rights:
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Document type:
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Article - Published version
Conference Object |
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Published by:
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Institute of Electrical and Electronics Engineers (IEEE)
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Share:
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