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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
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dc.contributor | Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions |
dc.contributor.author | Aragonès Cervera, Xavier |
dc.contributor.author | Moll Echeto, Francisco de Borja |
dc.contributor.author | Roca Adrover, Miquel |
dc.contributor.author | Rubio Sola, Jose Antonio |
dc.date | 1995-10 |
dc.identifier.citation | Aragones, X. [et al.]. Analysis and modelling of parasitic substrate coupling in CMOS circuits. "IEE proceedings-Circuits devices and systems", Octubre 1995, vol. 142, núm. 5, p. 307-312. |
dc.identifier.citation | 1350-2409 |
dc.identifier.citation | 10.1049/ip-cds:19952164 |
dc.identifier.uri | http://hdl.handle.net/2117/24193 |
dc.language.iso | eng |
dc.relation | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=487937 |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights | info:eu-repo/semantics/openAccess |
dc.rights | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats |
dc.subject | Integrated circuits |
dc.subject | CMOS integrated circuits |
dc.subject | Capacitance |
dc.subject | Integrated circuit modelling |
dc.subject | Integrated circuit noise |
dc.subject | Substrates |
dc.subject | Circuits integrats |
dc.title | Analysis and modelling of parasitic substrate coupling in CMOS circuits |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/article |
dc.description.abstract | |
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