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Cross-talk extraction from mask layout
Sicard, E.; Demonchaux, T.; Noullet, J.L.; Rubio Sola, Jose Antonio
Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
The principles of an automated cross-talk extractor from the mask-level description of a CMOS integrated circuit are detailed. The physical extraction principles, the techniques for parasitic coupling evaluation and modeling, the technique for back-annotating the schematic diagram of the integrated circuit are presented. A model for mixed-level simulation is proposed, covering various parasitic effects of the cross-talk phenomenon. The efficiency of the cross-talk extractor is demonstrated through the analysis of mixed digital/analog CMOS integrated circuits where critical couplings are predicted and eliminated
Peer Reviewed
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica
Integrated circuits
Microelectronics
CMOS integrated circuits
Circuit analysis computing
Circuit layout CAD
Crosstalk
Integrated circuit interconnections
Integrated circuit modelling
Mixed analogue-digital integrated circuits
Circuits integrats
Microelectrònica
Attribution-NonCommercial-NoDerivs 3.0 Spain
http://creativecommons.org/licenses/by-nc-nd/3.0/es/
info:eu-repo/semantics/publishedVersion
info:eu-repo/semantics/conferenceObject
Institute of Electrical and Electronics Engineers (IEEE)
         

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