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Design of an on–chip linear–assisted DC–DC voltage regulator
Cosp Vilella, Jordi; Martínez García, Herminio
Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. AHA - Arquitectures Hardware Avançades; Universitat Politècnica de Catalunya. EPIC - Disseny de circuits analògics integrats i de convertidors de potencia conmutats
This article shows the design of an on-chip CMOS linear-assisted DC-DC regulator. It results a good alternative topology to classic switching DC-DC power converters. In the presented technique, an auxiliary linear regulator is used to cancel the output voltage ripple and provides fast responses for load and line variations. On the other hand, a switching converter, connected in parallel, allows supplying almost the whole output current demanded by the load. The objective of this linear-assisted regulator or hybrid topology is to achieve a high efficiency of switching converters, with suitable load and line regulation features, typical of linear regulators. In this kind of on-chip applications, CMOS is the current prevailing technology. Thus, in order to implement on-chip power supply systems and on-chip power management systems with low to medium current consumption, this structure has good features.
Àrees temàtiques de la UPC::Enginyeria electrònica
On-chip CMOS linear-assisted DC-DC regulators. Switching DC-DC power converters. Voltage linear regulators.
Convertidors continu-continu
Metall-òxid-semiconductors complementaris
Attribution-NonCommercial-NoDerivs 3.0 Spain
http://creativecommons.org/licenses/by-nc-nd/3.0/es/
info:eu-repo/semantics/publishedVersion
info:eu-repo/semantics/conferenceObject
Institute of Electrical and Electronics Engineers (IEEE)
         

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