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A cache design for probabilistically analysable real-time systems
Kosmidis, Leonidas; Abella Ferrer, Jaume; Quiñones Moreno, Eduardo; Cazorla Almeida, Francisco Javier
Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
Àrees temàtiques de la UPC::Informàtica::Hardware
Embedded computer systems
Fault-tolerant computing
Amount of information
Cache access
Hardware complexity
Hardware design
Random placement
Set-associative
Timing Analysis
Wcet analysis
Tolerància als errors (Informàtica)
Sistemes incrustats (Informàtica)
Attribution-NonCommercial-NoDerivs 3.0 Spain
http://creativecommons.org/licenses/by-nc-nd/3.0/es/
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