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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor.author | Kosmidis, Leonidas |
dc.contributor.author | Curtsinger, Charlie |
dc.contributor.author | Quiñones, Eduardo |
dc.contributor.author | Abella Ferrer, Jaume |
dc.contributor.author | Berger, Emery D. |
dc.contributor.author | Cazorla Almeida, Francisco Javier |
dc.date | 2013 |
dc.identifier.citation | Kosmidis, L. [et al.]. Probabilistic timing analysis on conventional cache designs. A: Design, Automation and Test in Europe. "DATE 13: Design, Automation and Test in Europe: Grenoble, France, March 18 - 22, 2013". Grenoble: 2013, p. 603-606. |
dc.identifier.citation | 978-398153700-0 |
dc.identifier.citation | 10.7873/DATE.2013.132 |
dc.identifier.uri | http://hdl.handle.net/2117/22286 |
dc.language.iso | eng |
dc.relation | http://www.scopus.com/record/display.url?eid=2-s2.0-84885577813&origin=resultslist&sort=plf-f&src=s&st1=%22Probabilistic+timing+analysis+on+conventional+cache+designs%22&sid=61A5E8476618B88D35E7A7B77190DA18.y7ESLndDIsN8cE7qwvy6w%3a110&sot=q&sdt=b&sl=81&s=TITLE-ABS-KEY-AUTH%28%22Probabilistic+timing+analysis+on+conventional+cache+designs%22%29&relpos=0&relpos=0&citeCnt=0&searchTerm=TITLE-ABS-KEY-AUTH%28\%26quot%3BProbabilistic+timing+analysis+on+conventional+cache+designs\%26quot%3B%29 |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights | info:eu-repo/semantics/openAccess |
dc.rights | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Hardware |
dc.subject | Embedded computer systems |
dc.subject | Tolerància als errors (Informàtica) |
dc.subject | Cache design |
dc.subject | Compiler techniques |
dc.subject | Exceedance probability |
dc.subject | Memory layout |
dc.subject | Random replacements |
dc.subject | Runtime systems |
dc.subject | Timing Analysis |
dc.subject | Worst-case execution time analysis |
dc.subject | Sistemes incrustats (Informàtica) |
dc.subject | Fault-tolerant computing |
dc.title | Probabilistic timing analysis on conventional cache designs |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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