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dc.contributor | Universitat Politècnica de Catalunya. Departament de Llenguatges i Sistemes Informàtics |
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dc.contributor | Universitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals |
dc.contributor.author | San Pedro Martín, Javier de |
dc.contributor.author | Nikitin, Nikita |
dc.contributor.author | Cortadella, Jordi |
dc.contributor.author | Petit Silvestre, Jordi |
dc.date | 2013 |
dc.identifier.citation | De San Pedro, J. [et al.]. Physical planning for the architectural exploration of large-scale chip multiprocessors. A: IEEE/ACM International Symposium on Networks-on-Chip. "2013 Seventh IEEE/ACM International Symposium on Networks on Chip (NoCS)". Tempe: 2013, p. 1-2. |
dc.identifier.citation | 978-1-4673-6491-1 |
dc.identifier.citation | 10.1109/NoCS.2013.6558399 |
dc.identifier.uri | http://hdl.handle.net/2117/20300 |
dc.language.iso | eng |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Enginyeria de la telecomunicació::Telemàtica i xarxes d'ordinadors |
dc.subject | Circuit layout |
dc.subject | Network routing |
dc.subject | Microprocessor chips Computer networks Information systems |
dc.subject | CMP |
dc.title | Physical planning for the architectural exploration of large-scale chip multiprocessors |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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