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Producer-consumer: the programming model for future many-core processors
Prat Pérez, Arnau; Domínguez Sal, David; Larriba Pey, Josep; Troncoso, Pedro
Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. DAMA-UPC - Data Management Group
The massive addition of cores on a chip is adding more pressure to the accesses to main memory. In order to avoid this bottleneck, we propose the use of a simple producer-consumer model, which allows for the temporary results to be transferred directly from one task to another. These data transfer operations are performed within the chip, using on-chip memory, thus avoiding costly off-chip memory accesses. We implement this model on a real many-core processor, the 48-core Intel Single-chip Cloud Computer processor using its on-chip memory facilities. We find that the Producer-Consumer model adapts to such architectures and allow to achieve good task and data parallelism. For the evaluation of the proposed platform we implement a graph-based application using the Producer- Consumer model. Our tests show that the model scales very well as it takes advantage of the on-chip memory. The execution times of our implementation are up to 9 times faster than the baseline implementation, which relies on storing the temporary results to main memory.
Peer Reviewed
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
Computer architecture
Data parallelism
Execution time
Graph-based
Main memory
Many-core processors
Model scale
Off-chip memories
On chip memory
Programming models
Single-chip cloud computers
Arquitectura d'ordinadors
Attribution-NonCommercial-NoDerivs 3.0 Spain
http://creativecommons.org/licenses/by-nc-nd/3.0/es/
info:eu-repo/semantics/publishedVersion
info:eu-repo/semantics/conferenceObject
Springer
         

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