CMOS fast transient low-dropout regulator

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RECERCAT Home > Universitat Politècnica de Catalunya > Documents de recerca > View document

To access the full text documents, please follow this link: http://hdl.handle.net/2117/19332

dc.contributor	Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.contributor	Universitat Politècnica de Catalunya. EPIC - Energy Processing and Integrated Circuits
dc.contributor.author	Saberkari, Alireza
dc.contributor.author	Alarcón Cot, Eduardo José
dc.contributor.author	Shokouhi, Shahriar B.
dc.date	2012
dc.identifier.citation	Saberkari, A.; Alarcon, E.; Shokouhi, S. CMOS fast transient low-dropout regulator. A: Iranian Conference Electrical Engineering. "20th Iranian Conference on Electrical Engineering (ICEE) 2012: 15-17 May 2012: Tehran, Iran". Tehran: Institute of Electrical and Electronics Engineers (IEEE), 2012, p. 105-108.
dc.identifier.citation	978-1-4673-1149-6
dc.identifier.citation	10.1109/IranianCEE.2012.6292333
dc.identifier.uri	http://hdl.handle.net/2117/19332
dc.language.iso	eng
dc.publisher	Institute of Electrical and Electronics Engineers (IEEE)
dc.relation	http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6292333
dc.rights	Attribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights	info:eu-repo/semantics/openAccess
dc.rights	http://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subject	Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
dc.subject	Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica
dc.subject	Integrated circuits
dc.subject	fast transient
dc.subject	level-shifted flipped voltage follower
dc.subject	low-dropout
dc.subject	Circuits integrats
dc.title	CMOS fast transient low-dropout regulator
dc.type	info:eu-repo/semantics/publishedVersion
dc.type	info:eu-repo/semantics/conferenceObject
dc.description.abstract	In this paper a fast transient response CFA-based low-dropout regulator (LDO) is introduced. The circuit is stable for 0-100mA output load current and a 1μF output capacitor without any internal compensation. The CFA consists of a voltage follower with output local current-current feedback based on a level-shifted flipped voltage follower (LSFVF) which is instrumental to achieve high regulation and fast transient response. The inverting output buffer stage of the CFA together with current-mirror-based driving of the pass transistor results in high PSRR. Full transistor-level simulation results for an AMS 0.35μm CMOS process design reveal that the proposed LDO dissipates 58μA quiescent current at no-load condition and in worst case conditions has a current efficiency of 99.8%. For a 1μF output capacitor, the maximum output voltage variation to a 0-100mA load transient with rise and fall time of 10 and 100ns is only 2.5mV, and the PSRR is smaller than -58dB over the entire load current range.
dc.description.abstract	Peer Reviewed

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