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Power MOSFET technology roadmap toward high power density voltage regulators for next-generation computer processors
López, Toni; Alarcón Cot, Eduardo José
Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. EPIC - Disseny de circuits analògics integrats i de convertidors de potencia conmutats
A synchronous buck converter based multiphase architecture is evaluated to determine whether or not the most widespread voltage regulator (VR) topology canmeet the power delivery requirements of next-generation computer processors. The applied analysis methodology relies on accurate device models for circuit simulations, where the power MOSFETs are central due to their primary relevance to power losses. The method is referred to as virtual design loop and aims at optimizing the overall system performance with minimum empirical efforts. This is successfully applied to the development of a power MOSFET technology offering outstanding dynamic and static performance characteristics in the application. From a system perspective, the limits of power density conversion will be explored for this and other emerging technologies that promise to open up a new paradigm in power integration capabilities.
Peer Reviewed
Àrees temàtiques de la UPC::Enginyeria electrònica
Computer architecture
Arquitectura d'ordinadors
info:eu-repo/semantics/publishedVersion
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