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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Luque, Carlos |
dc.contributor.author | Moreto Planas, Miquel |
dc.contributor.author | Cazorla Almeida, Francisco Javier |
dc.contributor.author | Gioiosa, Roberto |
dc.contributor.author | Buyuktosunoglu, Alper |
dc.contributor.author | Valero Cortés, Mateo |
dc.date | 2009 |
dc.identifier.citation | Luque, C. [et al.]. ITCA: inter-task conflict-aware CPU accounting for CMPs. A: International Conference on Parallel Architectures and Compilation Techniques. "The Eighteenth International Conference on Parallel Architectures and Compilation Techinques". Raleigh, North Carolina: IEEE Computer Society Publications, 2009, p. 203-213. |
dc.identifier.citation | 978-0-7695-3771-9 |
dc.identifier.citation | 10.1109/PACT.2009.33 |
dc.identifier.uri | http://hdl.handle.net/2117/12246 |
dc.language.iso | eng |
dc.publisher | IEEE Computer Society Publications |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Multiprocessors |
dc.subject | Cache memory |
dc.subject | System design |
dc.subject | Cycle accounting |
dc.subject | Chip-Multiprocessor |
dc.subject | Cache partitioning algorithms |
dc.subject | Fairness |
dc.subject | ATD |
dc.subject | Multiprocessadors |
dc.subject | Memòria ràpida de treball (Informàtica) |
dc.subject | Disseny de sistemes |
dc.title | ITCA: inter-task conflict-aware CPU accounting for CMPs |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract |