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The velox transactional memory stack
Cristal Kestelman, Adrián; Felber, Pascal; Riviere, Etienne; Moreira, Walter Maldonado; Harmanci, Derin; Marlier, Patrick; Diestelhorst, Stephan; Hohmuth, Michael; Pohlack, Martin; Afek, Yehuda; Tomić, Saša; Drepper, Ulrich; Gramoli, Vincent; Kapalka, Michal; Guerraoui, Rachid; Dragojevic, Aleksandar; Stenstrom, Per; Unsal, Osman Sabri; Hur, Ibrahim; Korland, Guy; Nowack, Martin; Riegel, Torvald; Shavit, Nir; Fetzer, Christof
Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors
The transactional memory programming paradigm could become the coordination methodology of choice for actual and future multicore and many-core architectures. The transactional memory support spans a complete software and hardware stack, including programming language and hardware support, runtime and libraries, compilers, and application environments. The VELOX project has developed such a comprehensive transactional memory stack.
Peer Reviewed
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles
Computer architecture
Parallel programming (Computer science)
Concurrent programming
Velox transactional memory stack
Arquitectura de computadors
Programació paral·lela (Informàtica)
Multiprocessadors
info:eu-repo/semantics/publishedVersion
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