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Preliminary work on a mechanism for testing a customized architecture
González, Cecilia; Jiménez González, Daniel; Martorell Bofill, Xavier; Álvarez Martínez, Carlos; Gaydadjiev, Georgi
Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. CAP - Grup de Computació d´Altes Prestacions
Hardware customization for scientific applications has shown a big potential for reducing power consumption and increasing performance. In particular, the automatic generation of ISA extensions for General-Purpose Processors (GPPs) to accelerate domain-specific applications is an active field of research. Those domain-specific customized processors are mostly evaluated in simulation environments due to technical and programmability issues while using real hardware. There is no automatic mechanism to test ISA extensions in a real hardware environment. In this paper we present a toolchain that can automatically identify candidate parts of the code suitable for acceleration to test them in a reconfigurable hardware. We validate our toolchain using a bioinformatic application, ClustalW, obtaining an overall speed-up over 2x.
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
High performance computing
ISA extensions
General-purpose processors
GPPs
Càlcul intensiu (Informàtica)
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