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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Cakarevic, Vladimir |
dc.contributor.author | Radojkovic, Petar |
dc.contributor.author | Cazorla Almeida, Francisco Javier |
dc.contributor.author | Gioiosa, Roberto |
dc.contributor.author | Nemirovsky, Mario |
dc.contributor.author | Valero Cortés, Mateo |
dc.contributor.author | Pajuelo González, Manuel Alejandro |
dc.contributor.author | Verdú Mulà, Javier |
dc.date | 2008-06-04 |
dc.identifier.citation | Cakarevic, V. [et al.]. Overhead of the spin-lock loop in UltraSPARC T2. A: HiPEAC Industrial Workshop. "5th HiPEAC Industrial Workshop. Tools and Methodology for Parallel Programming". Barcelona: 2008, p. 1-2. |
dc.identifier.uri | http://hdl.handle.net/2117/9973 |
dc.language.iso | eng |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights | info:eu-repo/semantics/openAccess |
dc.rights | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Simultaneous multithreading processors |
dc.subject | Parallel processing (Electronic computers) |
dc.subject | Processament en paral·lel (Ordinadors) |
dc.subject | Multiprocessadors |
dc.title | Overhead of the spin-lock loop in UltraSPARC T2 |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract |