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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Gupta, Manoj |
dc.contributor.author | Llosa Espuny, José Francisco |
dc.contributor.author | Sánchez Carracedo, Fermín |
dc.date | 2007-07 |
dc.identifier.citation | Gupta, M.; Llosa, J.; Sánchez, F. Performance evaluation of cluster-level SMT VLIW processors. A: Advanced Computer Architecture and Compilation for Embedded Systems. "ACACES 2007: poster abstracts: July 18, 2007, L'Aquila, Italy". L'Aquila: 2007, p. 185-188. |
dc.identifier.uri | http://hdl.handle.net/2117/6468 |
dc.language.iso | eng |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights | info:eu-repo/semantics/openAccess |
dc.rights | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Simultaneous multithreading processors |
dc.subject | Embedded computer systems |
dc.subject | Clustering |
dc.subject | VLIW processor |
dc.subject | Multithreading |
dc.subject | CSMT |
dc.subject | Microprocessadors |
dc.title | Performance evaluation of CSMT for VLIW processors |
dc.type | info:eu-repo/semantics/submittedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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