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Acceleration of Complex Algorithms on a Fast Reconfigurable Embedded System on Spartan-3
Canto Navarro, Enrique Fernando; Fons, Mariano; López García, Mariano; Ramos Lara, Rafael Ramón
Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. SARTI - Sistemes d´adquisició Remota i Tractament de la Informació
Complex algorithms usually require several computation stages. Many embedded microprocessors have not enough computational performance to resolve these algorithms in a reasonable time, so dedicated coprocessors accelerate them although the main drawback is the area devoted to them. A reconfigurable coprocessor can drastically reduce the area, since it accommodates a set of coprocessors whose execution is multiplexed on time, although the reconfiguration speed reduces the overall system performance. Although self-reconfigurable systems are possible on Spartan-3 FPGAs, it requires a hard design task due to the lack of software and hardware support available on higher-cost families. This paper describes the architecture of a fast self-reconfigurable embedded system mapped on Spartan-3, used as computation platform to solve a complex algorithm, such as the image-processing carried out in a fingerprint biometric algorithm. In order to reduce the reconfiguration time, the system uses our custom-made memory and reconfiguration controllers. Moreover, the dynamic coprocessor can access directly to external memory through our memory controller to improve processing time.
Peer Reviewed
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica
Field programmable gate arrays
Arquitectura d'ordinadors -- Congressos
Microprocessadors -- Congressos
Attribution-NonCommercial-NoDerivs 3.0 Spain
http://creativecommons.org/licenses/by-nc-nd/3.0/es/
info:eu-repo/semantics/publishedVersion
info:eu-repo/semantics/conferenceObject
         

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