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Improved current-source sizing for high-speed high-accuracy current steering d/a converters
Miquel, Albiol; González Jiménez, José Luis; Alarcón Cot, Eduardo José
Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. HIPICS - Grupo de Circuitos y Sistemas Integrados de Altas Prestaciones; Universitat Politècnica de Catalunya. EPIC - Disseny de circuits analògics integrats i de convertidors de potencia conmutats
This paper describes a design methodology for the basic current source cell circuit of high-speed high-accuracy current steering DIA conveners taking into account mismatching in all the transistors of the cell. Previous works consider arbitrary safety margins in the sizing process. The presented approach allows a more accurale selection of the optimal design point. The design methodology is illustrated for a particular design of a 0.35pm CMOS 12-bit 400 MHz current-steering segmented DIA converter.
Àrees temàtiques de la UPC::Enginyeria electrònica
Electronics
Digital-to-analog converters
Electrònica
info:eu-repo/semantics/publishedVersion
info:eu-repo/semantics/conferenceObject
IEEE
         

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