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Title:
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Power supply noise and logic error probability
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Author:
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Andrade Miceli, Dennis Michael; Martorell Cid, Ferran; Pons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio, Antonio
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Other authors:
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Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions |
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Abstract:
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Voltage fluctuations caused by parasitic impedances in the power supply rails of modern ICs are a major concern in nowadays ICs. The voltage fluctuations are spread out to the diverse nodes of the internal sections causing two effects: a degradation of performances mainly impacting gate delays and
a noisy contamination of the quiescent levels of the logic that drives the node. Both effects are presented together, in this
paper, showing than both are a cause of errors in modern and future digital circuits. The paper groups both error mechanisms
and shows how the global error rate is related with the voltage deviation and the period of the clock of the digital system. |
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Abstract:
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Peer Reviewed |
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Subject(s):
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-Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
-Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Processadors digitals
-Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica
-Integrated circuits Computer-aided design Statistical methods.
-Integrated circuits Ultra large scale integration
-Power supply noise
-Error probability
-Circuits integrats a molt gran escala -- Defectes -- Models matemàtics
-Circuits integrats -- CMOS |
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Rights:
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Document type:
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Conference Object |
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Share:
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