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A translinear, log-domain FPAA on standard CMOS technology
Fernández, Daniel; Martínez Alvarado, Luis Arturo; Madrenas Boadas, Jordi
Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. AHA - Arquitectures Hardware Avançades
A field-programmable analog array (FPAA) using a standard-CMOS wide-dynamic-range translinear element (TE) is introduced. The FPAA configurable analog blocks (CABs) are based on a reconfigurable translinear cell (RTC), capable of implementing the basic circuit elements required by translinear and log-domain circuit design. The interfacing is provided by an I/O programmable cell, which allows for easier connectivity between the signal-processing core and the external circuitry. As a proof-of-concept, a 5 $times$ 5 RTC FPAA testchip was implemented in 0.35- $mu{hbox {m}}$ CMOS technology. A set of various circuit primitives, such as one- and four-quadrant multipliers, an Euclidean distance operator and a fourth-order log-domain filter, were mapped on the chip in order to demonstrate the versatility of the approach. FPAA bandwidth reaches 20 MHz with a power consumption of 30 $muhbox{W/TE}$ and precision errors below 3%.
Peer Reviewed
Àrees temàtiques de la UPC::Enginyeria electrònica::Circuits electrònics
Signal processing
Tractament del senyal
Circuits de microones
info:eu-repo/semantics/publishedVersion
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