The feasibility of a force-balance interface based on a second-order delta-sigma (/spl Delta//spl Sigma/) modulator for capacitive sensors has been analyzed in order to delimit the requirements to assure system stability for a given set of constraints related to the sensor-modulator system. A /spl Delta//spl Sigma/ modulator based on a switched-capacitor architecture with floating MOSFET capacitors has been implemented using a 0.7-/spl mu/m CMOS process. Nonlinear effects related to voltage dependence of the floating MOSFET capacitors have been avoided using a modulator architecture based on charge integrators. The behavior of the new proposed modulator has been measured experimentally and compared with an equivalent interface made with lineal capacitors. Similar results were obtained from both systems. In both circuits, the modulator resolution was better than 14 bits at a sample frequency of 250 kHz, and oversampling ratio of 256.