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Title:
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Improving performance guarantees in wormhole mesh NoC designs
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Author:
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Panic, Milos; Hernández, Carles; Abella Ferrer, Jaume; Quiñones, Eduardo; Cazorla Almeida, Francisco Javier
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Other authors:
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Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
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Abstract:
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Wormhole-based mesh Networks-on-Chip (wNoC) are deployed in high-performance many-core processors due to their physical scalability and low-cost. Delivering tight and time composable Worst-Case Execution Time (WCET) estimates for applications as needed in safety-critical real-time embedded systems is challenged by wNoCs due to their distributed nature. We propose a bandwidth control mechanism for wNoCs that enables the computation of tight time-composable WCET estimates with low average performance degradation and high scalability. Our evaluation
with the EEMBC automotive suite and an industrial real-time parallel avionics application confirms so. |
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Abstract:
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The research leading to these results is funded by the European Union Seventh
Framework Programme under grant agreement no. 287519 (parMERASA)
and by the Ministry of Science and Technology of Spain under contract TIN2012-34557. Milos Panic is funded by the Spanish Ministry of Education under the FPU grant FPU12/05966. Carles Hernández is jointly funded by the
Spanish Ministry of Economy and Competitiveness and FEDER funds through
grant TIN2014-60404-JIN. Jaume Abella is partially supported by the Ministry
of Economy and Competitiveness under Ramon y Cajal postdoctoral fellowship
number RYC-2013-14717. |
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Abstract:
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Peer Reviewed |
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Subject(s):
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-Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
-Logic circuits
-Embedded computer systems
-Embedded systems
-Mesh generation
-MESH networking
-Program compilers
-Real time systems
-Scalability
-Telecommunication networks
-Avionics applications
-Bandwidth control
-High scalabilities
-Improving performance
-Manycore processors
-Performance degradation
-Real-time embedded systems
-Worst-case execution time
-Circuits lògics
-Ordinadors immersos, Sistemes d' |
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Rights:
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Document type:
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Article - Submitted version
Conference Object |
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Published by:
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Institute of Electrical and Electronics Engineers (IEEE)
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