Título:
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Adaptive clock with useful jitter
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Autor/a:
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Cortadella, Jordi; Lavagno, Luciano; López Muñoz, Pedro; Lupon Navazo, Marc; Moreno Vega, Alberto; Roca Pérez, Antoni; Sapatnekar, Sachin S.
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Otros autores:
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Universitat Politècnica de Catalunya. Departament de Ciències de la Computació; Universitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals |
Abstract:
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Report - Departament Ciències de la Computació |
Abstract:
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The growing variability in nanoelectronic devices due to uncertainties from the manufacturing process and environmental conditions (power supply, temperature, aging) requires increasing design guardbands, forcing circuits to work with conservative clock frequencies. Various schemes for clock generation based on ring oscillators have been proposed with the goal to mitigate the power and performance losses
attributable to variability. However, there has been no systematic analysis to quantify the benefits of such schemes.This paper presents and analyzes an Adaptive Clocking scheme with
Useful Jitter (ACUJ) that uses variability as an opportunity to reduce power by adapting the clock frequency to the varying environmental conditions and, thus, reducing guardband margins significantly. Power can be reduced between 20% and 40% at iso-performance and performance can be boosted by similar amounts at iso-power. Additionally, energy savings can be translated to substantial advantages in terms of reliability and thermal management. More importantly, the technology can be adopted with minimal modifications to conventional EDA flows. |
Materia(s):
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-Àrees temàtiques de la UPC::Informàtica::Aplicacions de la informàtica -Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Sistemes digitals programables -Estabilitat de freqüència -Nanoelectronics -Estabilitat de freqüència -Nanoelectrònica |
Derechos:
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Tipo de documento:
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Artículo - Versión publicada Informe |
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