Abstract:
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While hardware caches are generally effective
at improving application performance, they greatly complicate
performance prediction. Slight changes in memory
layout or data access patterns can lead to large and systematic
increases in cache misses, degrading performance. In
the worst case, these misses can effectively render the cache
useless. These pathological cases, or “cache risk patterns”,
are difficult to predict, test or debug, and their presence
limits the usefulness of caches in safety critical real-time
systems, especially in hard real-time environments.
In this paper, we explore the effect of randomized cache
replacement policies in real-time systems with stringent
timing constrains. We present simulation-based results
on representative examples that illustrate the problem of
performance anomalies with standard cache replacement
policies. We show that, by eliminating dependencies on
access history, randomized replacement greatly reduces
the risk of these cache-based performance anomalies,
enabling probabilistic worst-case execution time analysis. |