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On evaluating temperature as observable for CMOS technology variability
Altet Sanahujes, Josep; Gómez Salinas, Dídac; Dufis, Cédric Yvan; González Jiménez, José Luis; Mateo Peña, Diego; Aragonès Cervera, Xavier; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio
Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
The temperature at surface of a silicon die depends on the activity of the circuits placed on it. In this paper, it is analyzed how Process, Voltage and Temperature (PVT) variations affect simultaneously some figures of merit (FoM) of some digital and analog circuits and the power dissipated by such circuits. It is shown that in some cases, a strong correlation exists between the variation of the circuit FoM and the variation of the dissipated power. Since local temperature increase at the silicon surface close to the circuit linearly depends on dissipated power, the results show that temperature can be considered as an observable magnitude for CMOS technology variability monitoring.
-Àrees temàtiques de la UPC::Enginyeria de la telecomunicació
-Metal oxide semiconductors, Complementary
-Signal theory (Telecommunication)
-Electromotive force
-Radio frequency microelectromechanical systems
-Senyal, Teoria del (Telecomunicació)
Article - Published version
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