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Title:
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Translinear signal processing circuits in standard CMOS FPAA
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Author:
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Martínez Alvarado, Luis Arturo; Madrenas Boadas, Jordi; Fernández Martínez, Daniel
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Other authors:
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Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. AHA - Arquitectures Hardware Avançades |
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Abstract:
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In this paper, the implementation of signal processing
circuits on a novel translinear Field-Programmable Analog
Array (FPAA) testchip is reported. The FPAA testchip is based
on a 0.35-micron, fully CMOS translinear element, which is the
core block of a reconfigurable analog cell. The FPAA embeds a
5 5 cell array. As implementation examples, a four-quadrant
multiplier with five decade dynamic range and a programmable
fourth-order low-pass filter with up to 7 MHz bandwidth have
been mapped on the translinear FPAA. 14 cells have been used
for the four-quadrant multiplier while 18 cells were needed for
the fourth-order low-pass filter. |
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Subject(s):
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-Àrees temàtiques de la UPC::Enginyeria de la telecomunicació::Processament del senyal
-Electric circuits
-Adaptive signal processing
-Circuits
-Senyal, Teoria del (Telecomunicació) |
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Rights:
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Document type:
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Article - Published version
Conference Object |
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Published by:
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IEEE Press. Institute of Electrical and Electronics Engineers
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