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Title:
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Measuring the tolerance of self-adaptive clocks to supply voltage noise
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Author:
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Pérez Puigdemont, Jordi; Moll Echeto, Francisco de Borja; Cortadella, Jordi
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Other authors:
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Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. Departament de Llenguatges i Sistemes Informàtics; Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions; Universitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals |
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Abstract:
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Simultaneous switching noise has become an important issue due to its signal integrity and timing implications.
Therefore a lot of time and resources are spent during the PDN design to minimize the supply voltage variation. This paper presents the self-adaptive clock as an alternative to tolerate the critical path delay variation due to supply noise thanks to its self-adaptable nature. A self-adaptive clock generation circuit is
proposed in this paper and its benefits, in terms of clock period reduction, are assessed under a realistic supply noise obtained through simulation for different switching activities. |
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Abstract:
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Peer Reviewed |
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Subject(s):
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-Àrees temàtiques de la UPC::Informàtica::Informàtica teòrica::Algorísmica i teoria de la complexitat
-Àrees temàtiques de la UPC::Enginyeria electrònica::Electrònica de potència
-Power supply noise
-Timing
-Adaptive clocks
-Tolerance to variations
-Process variations
-Circuits integrats -- CMOS |
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Rights:
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Document type:
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Article - Published version
Conference Object |
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